Towards URLLC with srsRANThis page presents latency analysis and improvement in radio access networks using the srsRAN software. Last updated on July 25, 2025. Feel free to contact me if you have any queries or would like to request access to my master's thesis. [NEWS] Check out our paper "Towards URLLC with Open-Source 5G Software" and the associated code repository! 1 Background1.1 Radio Access Network
The 5G network consists of two subsystems: the Radio Access Network (RAN) and the Mobile Core.
1.2 gNB’s Data Processing Pipeline
The functionality of a gNB can be split into the Radio Unit (RU), Distributed Unit (DU), and Central Unit (CU).
1.3 5G Frame Structure
The 5G frame structure is designed
to be more flexible than its predecessors.
2 Latency Analysis2.1 Functionality of Radio Units
The RU-downlink (DL) processor performs OFDM modulation .
2.2 Latency in Radio Units
① When RH slot s begins, the RH receives the UL signal from the air, converts it into UL samples, and
then forwards them to the software interface. 2.3 Functionality of Distributed Units
The DU processor reads DL segments from the RLC layer and converts them into DL
frequency-domain symbols, and vice versa. 2.4 Latency in Distributed Units (Downlink)
① When the RU-DL processor finishes preparing DL samples for DP slot s + H − 1, it notifies the DU processor
of the beginning of DU slot s + H + M. When it
receives the notification, the DU processor first decides on resource allocation
for DL transmission and/or UL reception. 2.5 An Example for the Case of M = 1
In DU slot s + 2, a sudden slowdown in the DU’s execution occurs. The
execution time in this DU slot is much longer than usual. 2.6 Latency in Distributed Units (Uplink)
④ When the RU-UL processor finishes preparing UL symbols for UP slot s, it forwards these symbols to the DU processor
immediately. 2.7 Summary of Slot Offsets
At any given time point, there exist an H-slot offset and an M-slot offset.
2.8 Sources of Latency
The latency introduced by system implementation: H-slot and M-slot offsets
2.9 Latency Breakdown (srsRAN)
Steps ③ to ⑤: DL one-way latency > (H + M + 1) × 0.5 ms = 2.5 ms 3 Latency Improvement3.1 Latency in Radio Units (Recall)
The RU-DL processor always prepares DL samples at the end of a DP slot.
3.2 Preparing Samples in Advance (M1)
Instead of waiting for the RU-UL processor, the RU-DL processor prepares DL samples at the beginning of a DP slot.
3.3 Latency Breakdown (M1)
Steps ③ to ⑤: DL one-way latency > (H + M + 1) × 0.5 ms = 1.5 ms 3.4 Event-Driven Symbol Transforming (M2)
① When DU slot s begins, the DU processor
starts to prepare resource allocation results and DL symbols.
3.5 Latency Breakdown (M1 + M2)
Steps ③ to ⑤: DL one-way latency > (H + M + 1) × 0.5 ms = 1 ms 4 Evaluation4.1 Latency Results: Baseline (srsRAN)
The DL one-way latency mainly spans from 3 ms and 4.5 ms. 4.2 Latency Results: Baseline vs M1 (Preparing Samples in Advance)
The distribution of the DL one-way latency has shifted to the left by 1 ms. 4.3 Latency Results: Baseline vs M1 + M2 (Event-Driven Symbol Transforming)
The distribution of the DL one-way latency has shifted to the left by 1.5 ms
. 4.4 Overall Comparison
We improve one-way latency for DL by 40.67% and for UL by
26.75%. |